One or more aspects of the present invention relate generally to voltage control, and more particularly to controlling internal voltage supply levels provided to integrated circuits.
Programmable logic devices (PLDS) exist as a well-known type of integrated circuit (IC) that may be programmed by a user to perform specified logic functions. There are different types of programmable logic devices, such as programmable logic arrays (PLAS) and complex programmable logic devices (CPLDs). One type of programmable logic devices, called a field programmable gate array (FPGA), is very popular because of a superior combination of capacity, flexibility, time-to-market, and cost. An FPGA typically includes an array of configurable logic blocks (CLBs) surrounded by a ring of programmable input/output blocks (IOBs). The CLBs and IOBs are interconnected by a programmable interconnect structure. The CLBS, IOBs, and interconnect structure are typically programmed by loading a stream of configuration data (bitstream) into internal configuration memory cells that define how the CLBS, IOBs, and interconnect structure are configured. The configuration bitstream may be read from an external memory, conventionally an external integrated circuit memory EEPROM, EPROM, PROM, and the like, though other types of memory may be used. The collective states of the individual memory cells then determine the function of the FPGA.
Conventionally, external voltage signals are provided to internal die interconnections of integrated circuits such as PLDs, application specific integrated circuits (ASICS), and others, to provide local input power to internal circuitry and integrated circuits. Unfortunately, due to variations in integrated circuit power consumption, IR drops between integrated circuits and external voltage sources can negatively affect local integrated circuit input voltage levels and therefore affect integrated circuit performance. For example, with regard to PLDs, as timing oscillator circuits may be affected by changes to input voltage levels, variations in such input voltage levels to such a timing oscillator circuit may introduce fluctuations in timing clock signal frequency that may lead to incorrect PLD operation.
Others have attempted to resolve IR drop issues by providing a global reference voltage and on-chip global power regulation at some if not all of various integrated circuits localities. However, power regulation often relies on expensive voltage regulators that consume valuable die space. Others have relied on increasing the size and number of power and ground interconnections, and in some cases providing separate power and ground planes. Unfortunately, while increasing the amount and size of the power interconnections or even adding a power and ground plane, may help reduce IR drops, it also requires the use of valuable die space and increases the complexity of the die, especially as die sizes shrink to accommodate the demand for smaller integrated circuits.
Accordingly, it would be desirable and useful to provide power regulation apparatus and method for providing a low cost stable local internal voltage. Moreover, it would be desirable and useful to provide an on-chip local voltage for one or more integrated circuits that also compensates for thermal changes of such integrated circuits during operation.
An aspect of the present invention is a method for controlling voltage provided to an integrated circuit. The method includes generating a first frequency value responsive to a first voltage, and generating a second frequency value responsive to a second voltage. The second voltage is adjusted until the second frequency value is within range of the first frequency value.
An aspect of the present invention is a method for controlling voltage provided to an integrated circuit. The method includes generating a first frequency count indicative of a first voltage, storing the first frequency count, and generating a second frequency count responsive to a second voltage. The second frequency count is compared to the first frequency count stored, and the second frequency count is adjusted using the second voltage to maintain the second frequency count within range of the first frequency count stored.
An aspect of the present invention is a method for controlling a voltage supply configured to power at least a portion of at least one integrated circuit. A first voltage is converted to a first frequency value. An output voltage of the voltage supply is converted to a second frequency value, where the second frequency value varies as a function of the output voltage. The first frequency value is compared to the second frequency value, and the output voltage is adjusted until the first frequency value and second frequency value are within a range of each other. The second frequency value is maintained within the range.
An aspect of the present invention is an apparatus to control voltage. A voltage controlled oscillator is selectively coupled to a first voltage supply having a first voltage output and second voltage supply having a second voltage output. The first voltage output and second voltage output are selectively coupled to the voltage controlled oscillator so that the output frequency of the voltage controlled oscillator is responsive to a selected one of the first voltage output and second voltage output. A voltage control loop circuit is coupled to the voltage controlled oscillator. The voltage control loop circuit is configured to compare a first frequency value of the voltage controlled oscillator associated with the first voltage output with a second frequency value associated with a second voltage output. The voltage control loop circuit adjusts the second voltage output until the second frequency value is within a range of the first frequency value.